physical layer product features: t en 10/100/1000 mbit/s rgmii/rtbi interfaces csix-64 ac class2 host interface full bandwidth, non-blocking performance on the receive and the transmit internal short-haul flow control memory 1024 kbit ingress and egress fifos advanced link aggregation/trunking based on smac/dmac and mpls label in conjunction with meigs-i? aggregation/port trunking between 10g and tri-speed ports in conjunction with meigs-i? intelligent vlan and mpls tagging/ untagging feature serial cpu interface for register access full rmon 1, ieee802.3, and snmp statistics asic/fpga friendly csix-64 interface jumbo frame support advanced test features including internal loop-back, frame collection, and replay VSC7322 lansing? - 10 x 1 gigabit ethernet mac chip specifications: 25 mhz reference clock 1.5 v csix-64 power supply 1.8 v core power supply 2.5 v rgmii/rtbi interface power supply 3.3 v cpu power supply 680-pin, 40 x 40 mm tsbga package applications: 10 port gigabit ethernet mac link aggregation/port trunking in conjunction with meigs-i? future-proof technology: VSC7322 is part of a product roadmap that includes advanced 10 gigabit ethernet technology. as such, the architecture of VSC7322 is designed to take advantage of emerging and future technologies ? effectively allowing manufacturers to future-proof switch applications. csix-64 10 x 1g vsc 7322 vsc 7320 10g fiber o/e csix-64 10 x 1 g vsc 7322 fpga application using the VSC7322 and a customer specific fpga to create a gigabit switching line card chipset application using the vsc7320 and VSC7322 back-to-back to aggregate 10 x 1g into 10g ethernet gigabit line card application: 10gbe to gigabit ethernet aggregation: ethernet product pb-VSC7322-002 .com .com .com .com 4 .com u datasheet
for more information on vitesse products visit the vitesse web site at www.vitesse.com or contact vitesse sales at (800) vitesse or sales@vitesse.com VSC7322 ?2002 vitesse semiconductor corporation lansing? is an advanced ethernet mac chip, allowing a system with a standard csix-64 host interface access to 10 tri- speed (10/100/1000 mbit/s) ethernet ports. the 10 separate tri-speed macs support both half-duplex and full duplex at 10/100 mbit/s and full duplex at 1 gbit/s. on-chip fifos capable of handling short-haul flow control are located between the ethernet ports and the csix-64 interface. these fifos are also useful for smoothing bursty traffic on both the csix-64 and the ethernet ports, and for compensating for the bursts generated when aggregating links. lansing? can be used together with meigs-i? in a flexible port aggregation or port trunking mode. the scheme can be based on mac addresses or mpls tags. VSC7322 block diagram: general description: lansing? - 10 x 1 gigabit ethernet mac chip rgmii/rtbi tr i-speed mac 10 x 1gbe fifos statistics csix-64 miim cpu serial i/f these features allow a 10gbe connection to behave like ten separate tri-speed connections, which make integration of 10gbe into existing designs simpler. aggregation can be made between the 10gbe port and csix-64 or directly between the 10gbe port and the 10 tri-speed ports. a dual mii management interface sets up and controls the phys. frames are monitored, and the statistics generated can be analyzed at a later time. all registers can be accessed via the serial or cpu interface. a comprehensive set of statistics counters supports the rmon 1, ieee802.3, and snmp standards. t est features include cyclic replay of frames at a user definable rate - either built by the external cpu directly inside the fifos or captures from incoming traffic. 741 calle plano camarillo, ca 93012, usa t el: +1 805.388.3700 fax: +1 805.987.5896 www.vitesse.com .com .com .com .com 4 .com u datasheet
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